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Computers generate addresses and either read data from memory or write data to memory. Instructions are read from memory sequentially, unless a branch or jump instruction modifies the flow of control. Cache memory systems rely on the "locality of reference" of data; that is, data elements are frequently accessed from locations that are close together. The goal of this project is to produce a CPU simulator that generates random addresses and data to simulate a real processor. The simulator can be programmed to behave in various modes. You can select how clustered the data is, the frequency of subroutine calls, the size of subroutines, and so on.
 
 

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